The present invention relates to power amplification devices for optical and electronic communications network, and more specifically to super-wideband power amplifier and modulator driver modules for high bit-rate SONET/SDH transmission channels.
Recently, the world has witnessed a phenomenal growth in the number of Internet users, applications and devices and in the amount of data traffic especially that of medium-rich contentxe2x80x94all demanding higher speed communications and connectivity over the Internet. To accommodate this demand, network carriers have begun to provide fiber optical channels to achieve ultra high speed communications.
FIG. 1 is a simplified block diagram showing the physical media dependent and PHY layers of an optical network interface. The optical signals sent along the fiber optical channels, e.g. at OC-192 rate, are detected and received by receiver that includes the detector 10 and the trans-impedance amplifier 11. After an optical signal is converted, which is then amplified to an electrical signal in the receiver, the clock signal and data are recovered by a clock and data recovery unit 12. The recovered serial data signal is demultiplexed by the DEMUX 13 down to a lower-speed parallel data stream which is then forwarded to a framing and protocol handling unit 14, for network processing.
On the transmitter""s side, parallel data generated from network processing are multiplexed up to higher speed serial data by MUX 18, which also multiplies the data clock speed to the serial data rate. The serial data signals are then amplified by the modulator driver 17 and the power amplifier 16 to a level sufficient to drive the optical modulator 15. The required level is typically 7 to 8 volts peak to peak to drive a LiNbO3 modulator. The modulator 15 then modulates a continuous-wave (CW) laser beam into on- or off-intervals each of which representing a digital 1 or 0 respectively. To improve output voltage swings for RF signals, the output of power amplifier 16 is typically connected to a bias tee circuit. The reason for using the bias tee is as follows: For a single chip implementation of the power amplifier 16, its last stage consumes most of the current. In order to isolate this stage from the rest of the amplifier, a resistive network with shunting capacitors is normally used on chip to supply its power. The drawback of this approach is that due to the large current draw of the last stage, the resistive network causes a significant voltage drop, which in turn limits the peak-to-peak swing of its output. A bias tee then is used to provide the power supply directly to the last stage. A bias tee circuit consists of only passive components. Its function is to provide a DC block between its input and output and a DC bias voltage to its input node. The method of providing the DC voltage to its input node has to be such that it does not affect the RF signal going from the input to the output and that no appreciable DC voltage drop occurs between the voltage source and the input of the bias tee under high current draw conditions.
Also, in order to monitor the level of voltage swing applied to the modulator 15, a power detector, which detects power levels for a wide band of RF frequencies, is typically implemented with the power amplifier 16.
FIG. 2 is a simplified circuit diagram of a conventional bias tee for RF applications. For application in optical communications, the data can have a long string of xe2x80x9c0sxe2x80x9d or xe2x80x9c1sxe2x80x9d or alternate single 0 and 1. Therefore its frequency can be as low as tens of KHz or as high as tens of GHz, e.g. from 30 KHz to 15 GHz for OC-192 and from 30 KHz to 50 GHz for OC-768. Thus wide band bias tees have to be used. To achieve wideband performance, a conventionally designed bias tee may need multiple inductors in series and multiple capacitors in parallel in order to cover the required wide frequency range. For example, one inductor L1 for 30 kHz to a few MHz, one L2 for a few MHz to 1 GHz and a third one L3 for 1 GHz to 15 GHz. Also, 3 capacitors, ranges from 0.1 uF to 1 pF, may be needed to cover the same bandwidth with the smaller one covering the higher frequency range. As can be appreciated by those skilled in the art, because of the use of multiple discrete components, a bias tee package for ultra wide bandwidth applications will end up with a physical dimension in excess of 1.5xe2x80x3xc3x971.5xe2x80x3. This is quite bulky and prone to RF loss due to inherent parasitic capacitances associated with the large size of these components. Large size is especially undesirable for use in optical transponders as the entire transponder size is only around 3xe2x80x3xc3x975xe2x80x3 or less.
FIG. 3 is a simplified circuit diagram of a conventional power detector for RF applications. Power detectors generally need to be in hermetically sealed packaging, with external RF feedthroughs at input and output, as well as an external coupler to couple RF energy. All these connected together end up with a package that tends to be quite bulky and costly. Most commercial power detectors also have limited bandwidth, insufficient for application in optical or electronic communications. Prior attempts to integrate the bias tee and power detector circuits into MICs such as power amplifiers or modulator drivers for ultra-wide bandwidth applications have not been entirely successful, largely due to the physical and performance limitations of the discrete components such as inductors and capacitors.
Therefore, for size and cost reduction there is a need to incorporate the bias tee into an MMIC package such as a power amplifier module in order to reduce overall size, and cost without compromising on performance.
There is also a need to incorporate the power detector into an MMIC package such as a power amplifier module for the same reason.
There is further a need to incorporate both the bias tee and power detector circuits into the same MMIC package such as a power amplifier module.
A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications, is disclosed. The power amplifier module, or also frequently referred to as modulator driver module, comprises first and second amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency.
Additionally, a power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply. The divider circuit taps off a portion of the energy from the output stage to be measured by a detection diode. A xc2xc-wave radial matching stub is connected to the detection diode to filter RF energy. Another xc2xc-wave matching stub is connected to the divider circuit to provide grounding. Capacitors are also connected to the output of the detection diode to filter noise in the detector output voltage over a entire frequency bandwidth.